238 lines
5.8 KiB
C
238 lines
5.8 KiB
C
/* Written 2000 by Andi Kleen */
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#ifndef __ARCH_DESC_H
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#define __ARCH_DESC_H
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#include <linux/threads.h>
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#include <asm/ldt.h>
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#ifndef __ASSEMBLY__
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#include <linux/string.h>
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#include <linux/smp.h>
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#include <asm/segment.h>
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#include <asm/mmu.h>
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// 8 byte segment descriptor
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struct desc_struct {
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u16 limit0;
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u16 base0;
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unsigned base1 : 8, type : 4, s : 1, dpl : 2, p : 1;
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unsigned limit : 4, avl : 1, l : 1, d : 1, g : 1, base2 : 8;
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} __attribute__((packed));
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struct n_desc_struct {
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unsigned int a,b;
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};
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extern struct desc_struct cpu_gdt_table[GDT_ENTRIES];
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enum {
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GATE_INTERRUPT = 0xE,
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GATE_TRAP = 0xF,
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GATE_CALL = 0xC,
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};
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// 16byte gate
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struct gate_struct {
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u16 offset_low;
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u16 segment;
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unsigned ist : 3, zero0 : 5, type : 5, dpl : 2, p : 1;
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u16 offset_middle;
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u32 offset_high;
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u32 zero1;
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} __attribute__((packed));
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#define PTR_LOW(x) ((unsigned long)(x) & 0xFFFF)
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#define PTR_MIDDLE(x) (((unsigned long)(x) >> 16) & 0xFFFF)
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#define PTR_HIGH(x) ((unsigned long)(x) >> 32)
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enum {
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DESC_TSS = 0x9,
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DESC_LDT = 0x2,
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};
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// LDT or TSS descriptor in the GDT. 16 bytes.
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struct ldttss_desc {
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u16 limit0;
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u16 base0;
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unsigned base1 : 8, type : 5, dpl : 2, p : 1;
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unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8;
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u32 base3;
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u32 zero1;
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} __attribute__((packed));
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struct desc_ptr {
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unsigned short size;
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unsigned long address;
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} __attribute__((packed)) ;
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#define load_TR_desc() asm volatile("ltr %w0"::"r" (GDT_ENTRY_TSS*8))
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#define load_LDT_desc() asm volatile("lldt %w0"::"r" (GDT_ENTRY_LDT*8))
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#define clear_LDT() asm volatile("lldt %w0"::"r" (0))
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/*
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* This is the ldt that every process will get unless we need
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* something other than this.
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*/
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extern struct desc_struct default_ldt[];
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extern struct gate_struct idt_table[];
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extern struct desc_ptr cpu_gdt_descr[];
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/* the cpu gdt accessor */
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#define cpu_gdt(_cpu) ((struct desc_struct *)cpu_gdt_descr[_cpu].address)
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static inline void _set_gate(void *adr, unsigned type, unsigned long func, unsigned dpl, unsigned ist)
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{
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struct gate_struct s;
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s.offset_low = PTR_LOW(func);
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s.segment = __KERNEL_CS;
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s.ist = ist;
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s.p = 1;
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s.dpl = dpl;
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s.zero0 = 0;
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s.zero1 = 0;
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s.type = type;
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s.offset_middle = PTR_MIDDLE(func);
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s.offset_high = PTR_HIGH(func);
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/* does not need to be atomic because it is only done once at setup time */
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memcpy(adr, &s, 16);
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}
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static inline void set_intr_gate(int nr, void *func)
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{
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BUG_ON((unsigned)nr > 0xFF);
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_set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 0, 0);
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}
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static inline void set_intr_gate_ist(int nr, void *func, unsigned ist)
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{
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BUG_ON((unsigned)nr > 0xFF);
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_set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 0, ist);
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}
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static inline void set_system_gate(int nr, void *func)
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{
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BUG_ON((unsigned)nr > 0xFF);
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_set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 3, 0);
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}
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static inline void set_system_gate_ist(int nr, void *func, unsigned ist)
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{
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_set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 3, ist);
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}
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static inline void set_tssldt_descriptor(void *ptr, unsigned long tss, unsigned type,
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unsigned size)
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{
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struct ldttss_desc d;
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memset(&d,0,sizeof(d));
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d.limit0 = size & 0xFFFF;
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d.base0 = PTR_LOW(tss);
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d.base1 = PTR_MIDDLE(tss) & 0xFF;
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d.type = type;
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d.p = 1;
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d.limit1 = (size >> 16) & 0xF;
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d.base2 = (PTR_MIDDLE(tss) >> 8) & 0xFF;
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d.base3 = PTR_HIGH(tss);
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memcpy(ptr, &d, 16);
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}
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static inline void set_tss_desc(unsigned cpu, void *addr)
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{
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/*
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* sizeof(unsigned long) coming from an extra "long" at the end
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* of the iobitmap. See tss_struct definition in processor.h
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*
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* -1? seg base+limit should be pointing to the address of the
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* last valid byte
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*/
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set_tssldt_descriptor(&cpu_gdt(cpu)[GDT_ENTRY_TSS],
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(unsigned long)addr, DESC_TSS,
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IO_BITMAP_OFFSET + IO_BITMAP_BYTES + sizeof(unsigned long) - 1);
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}
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static inline void set_ldt_desc(unsigned cpu, void *addr, int size)
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{
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set_tssldt_descriptor(&cpu_gdt(cpu)[GDT_ENTRY_LDT], (unsigned long)addr,
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DESC_LDT, size * 8 - 1);
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}
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static inline void set_seg_base(unsigned cpu, int entry, void *base)
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{
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struct desc_struct *d = &cpu_gdt(cpu)[entry];
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u32 addr = (u32)(u64)base;
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BUG_ON((u64)base >> 32);
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d->base0 = addr & 0xffff;
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d->base1 = (addr >> 16) & 0xff;
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d->base2 = (addr >> 24) & 0xff;
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}
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#define LDT_entry_a(info) \
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((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff))
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/* Don't allow setting of the lm bit. It is useless anyways because
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64bit system calls require __USER_CS. */
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#define LDT_entry_b(info) \
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(((info)->base_addr & 0xff000000) | \
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(((info)->base_addr & 0x00ff0000) >> 16) | \
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((info)->limit & 0xf0000) | \
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(((info)->read_exec_only ^ 1) << 9) | \
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((info)->contents << 10) | \
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(((info)->seg_not_present ^ 1) << 15) | \
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((info)->seg_32bit << 22) | \
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((info)->limit_in_pages << 23) | \
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((info)->useable << 20) | \
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/* ((info)->lm << 21) | */ \
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0x7000)
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#define LDT_empty(info) (\
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(info)->base_addr == 0 && \
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(info)->limit == 0 && \
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(info)->contents == 0 && \
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(info)->read_exec_only == 1 && \
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(info)->seg_32bit == 0 && \
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(info)->limit_in_pages == 0 && \
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(info)->seg_not_present == 1 && \
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(info)->useable == 0 && \
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(info)->lm == 0)
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#if TLS_SIZE != 24
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# error update this code.
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#endif
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static inline void load_TLS(struct thread_struct *t, unsigned int cpu)
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{
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u64 *gdt = (u64 *)(cpu_gdt(cpu) + GDT_ENTRY_TLS_MIN);
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gdt[0] = t->tls_array[0];
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gdt[1] = t->tls_array[1];
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gdt[2] = t->tls_array[2];
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}
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/*
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* load one particular LDT into the current CPU
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*/
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static inline void load_LDT_nolock (mm_context_t *pc, int cpu)
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{
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int count = pc->size;
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if (likely(!count)) {
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clear_LDT();
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return;
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}
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set_ldt_desc(cpu, pc->ldt, count);
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load_LDT_desc();
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}
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static inline void load_LDT(mm_context_t *pc)
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{
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int cpu = get_cpu();
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load_LDT_nolock(pc, cpu);
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put_cpu();
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}
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extern struct desc_ptr idt_descr;
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#endif /* !__ASSEMBLY__ */
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#endif
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