Remove unused proposal types, (fixes #137)

This commit is contained in:
Tobias 2018-09-29 17:56:44 +12:00
parent 0eacc8bf78
commit 27996c1960
5 changed files with 56 additions and 74 deletions

View file

@ -23,10 +23,8 @@ class CategoryAdmin(admin.ModelAdmin):
for model in [ models.TalkProposal, models.TutorialProposal,
models.MiniconfProposal, models.SysAdminProposal,
models.KernelProposal, models.GamesProposal,
models.OpenHardwareProposal, models.ClsXLCAProposal,
models.FuncProgProposal, models.OpenEdProposal,
models.OpenGLAMProposal, models.FPGAProposal, models.DevDevProposal,
models.ArtTechProposal, models.BioInformaticsProposal ]:
models.OpenHardwareProposal, models.OpenEdProposal,
models.DevDevProposal, models.ArtTechProposal ]:
admin.site.register(model, CategoryAdmin,
list_display = [
"id",

View file

@ -109,36 +109,12 @@ class OpenHardwareProposalForm(ProposalForm):
model = OpenHardwareProposal
fields = TALK_FORMAT_FIELDS
class ClsXLCAProposalForm(ProposalForm):
class Meta:
model = ClsXLCAProposal
fields = DEFAULT_FIELDS
class FuncProgProposalForm(ProposalForm):
class Meta:
model = FuncProgProposal
fields = DEFAULT_FIELDS
class OpenEdProposalForm(ProposalForm):
class Meta:
model = OpenEdProposal
fields = DEFAULT_FIELDS
class OpenGLAMProposalForm(ProposalForm):
class Meta:
model = OpenGLAMProposal
fields = DEFAULT_FIELDS
class FPGAProposalForm(ProposalForm):
class Meta:
model = FPGAProposal
fields = DEFAULT_FIELDS
class DevDevProposalForm(ProposalForm):
class Meta:
@ -156,9 +132,3 @@ class ArtTechProposalForm(ProposalForm):
model = ArtTechProposal
fields = ARTTECH_FIELDS
class BioInformaticsProposalForm(ProposalForm):
class Meta:
model = BioInformaticsProposal
fields = DEFAULT_FIELDS

View file

@ -0,0 +1,53 @@
# -*- coding: utf-8 -*-
# Generated by Django 1.11.15 on 2018-09-29 05:55
from __future__ import unicode_literals
from django.db import migrations
class Migration(migrations.Migration):
dependencies = [
('symposion_proposals', '0003_auto_20170702_2250'),
('symposion_reviews', '0001_initial'),
('symposion_schedule', '0007_auto_20161224_1709'),
('proposals', '0007_auto_20171023_2113_squashed_0008_auto_20171023_2114'),
]
operations = [
migrations.RemoveField(
model_name='bioinformaticsproposal',
name='proposalbase_ptr',
),
migrations.RemoveField(
model_name='clsxlcaproposal',
name='proposalbase_ptr',
),
migrations.RemoveField(
model_name='fpgaproposal',
name='proposalbase_ptr',
),
migrations.RemoveField(
model_name='funcprogproposal',
name='proposalbase_ptr',
),
migrations.RemoveField(
model_name='openglamproposal',
name='proposalbase_ptr',
),
migrations.DeleteModel(
name='BioInformaticsProposal',
),
migrations.DeleteModel(
name='ClsXLCAProposal',
),
migrations.DeleteModel(
name='FPGAProposal',
),
migrations.DeleteModel(
name='FuncProgProposal',
),
migrations.DeleteModel(
name='OpenGLAMProposal',
),
]

View file

@ -119,36 +119,12 @@ class OpenHardwareProposal(Proposal):
verbose_name = "Open Hardware Miniconf Proposal"
class ClsXLCAProposal(Proposal):
class Meta:
verbose_name = "CLSxLCA Miniconf Proposal"
class FuncProgProposal(Proposal):
class Meta:
verbose_name = "Real World Functional Programming Miniconf Proposal"
class OpenEdProposal(Proposal):
class Meta:
verbose_name = "Open Education Miniconf Proposal"
class OpenGLAMProposal(Proposal):
class Meta:
verbose_name = "OpenGLAM Miniconf Proposal"
class FPGAProposal(Proposal):
class Meta:
verbose_name = "FPGA Miniconf Proposal"
class DevDevProposal(Proposal):
class Meta:
@ -198,15 +174,5 @@ class ArtTechProposal(Proposal):
target_audience = models.IntegerField(choices=TARGET_AUDIENCES, default=TARGET_NA)
# def __init__(self, *args, **kwargs):
# super(ArtTechProposal, self).__init__(*args, **kwargs)
# self.target_audience = 3
class Meta:
verbose_name = "Art+Tech Miniconf Proposal"
class BioInformaticsProposal(Proposal):
class Meta:
verbose_name = "Open Source and BioInformatics Miniconf"

View file

@ -340,14 +340,9 @@ PROPOSAL_FORMS = {
"games-miniconf": "pinaxcon.proposals.forms.GamesProposalForm",
"openhardware-miniconf": "pinaxcon.proposals.forms.OpenHardwareProposalForm",
"kernel-miniconf": "pinaxcon.proposals.forms.KernelProposalForm",
"clsxlca-miniconf": "pinaxcon.proposals.forms.ClsXLCAProposalForm",
"funcprog-miniconf": "pinaxcon.proposals.forms.FuncProgProposalForm",
"opened-miniconf": "pinaxcon.proposals.forms.OpenEdProposalForm",
"openglam-miniconf": "pinaxcon.proposals.forms.OpenGLAMProposalForm",
"fpga-miniconf": "pinaxcon.proposals.forms.FPGAProposalForm",
"devdev-miniconf": "pinaxcon.proposals.forms.DevDevProposalForm",
"arttech-miniconf": "pinaxcon.proposals.forms.ArtTechProposalForm",
"bioinformatics-miniconf": "pinaxcon.proposals.forms.BioInformaticsProposalForm",
}
# Registrasion bits: